The example shows, how a frame is transmitted in TX_ARET mode. Within this mode, CCA is done automatically. Additionally the example illustrates, how the fram data can be directly manipulated in the SRAM (see IRQ service routine).
/* $Id: pgXmplTrxTxAret.html,v 1.1.1.4 2013/04/09 21:12:16 awachtler Exp $ */ /* Example for transmitting frames in tx_aret mode */ #include "board.h" #include "transceiver.h" #include "ioutil.h" #include "xmpl.h" static volatile bool tx_in_progress; static volatile uint8_t tx_cnt, fail_cnt; #define SEQ_OFFSET (2) #define TX_FAIL_OFFSET (7) #define TX_SRAM_OFFSET (1) int main(void) { trx_regval_t rval; uint8_t txfrm[] = {0x21,0x08, /* IEEE 802.15.4 FCF: data frame with ack request */ 42, /* sequence counter */ (PANID & 0xff), (PANID >> 8), /* destination PAN_ID */ (SHORT_ADDR & 0xff), (SHORT_ADDR >> 8), /* dest. short address */ 42, /* TX fail counter */ 'h','e','l','l','o',' ','µ','r','a','c','o','l','i','!', /* data */ 'X','X' /* these bytes are overwritten from transceivers * CRC generator directly before sent. */ }; /* This will stop the application before initializing the radio transceiver * (ISP issue with MISO pin, see FAQ) */ trap_if_key_pressed(); /* Step 0: init MCU peripherals */ LED_INIT(); trx_io_init(SPI_RATE_1_2); LED_SET_VALUE(LED_MAX_VALUE); LED_SET_VALUE(0); /* Step 1: initialize the transceiver */ TRX_RESET_LOW(); TRX_SLPTR_LOW(); DELAY_US(TRX_RESET_TIME_US); TRX_RESET_HIGH(); trx_reg_write(RG_TRX_STATE,CMD_TRX_OFF); DELAY_MS(TRX_INIT_TIME_US); rval = trx_bit_read(SR_TRX_STATUS); ERR_CHECK(TRX_OFF!=rval); LED_SET_VALUE(1); /* Step 2: setup transmitter * - configure radio channel * - enable transmitters automatic crc16 generation * - go into TX state, * - enable "transmit end" IRQ */ trx_bit_write(SR_CHANNEL,CHANNEL); trx_bit_write(SR_TX_AUTO_CRC_ON,1); trx_reg_write(RG_TRX_STATE,CMD_TX_ARET_ON); #if defined(TRX_IRQ_TRX_END) trx_reg_write(RG_IRQ_MASK,TRX_IRQ_TRX_END); #elif defined(TRX_IRQ_TX_END) trx_reg_write(RG_IRQ_MASK,TRX_IRQ_TX_END); #else # error "Unknown IRQ bits" #endif sei(); LED_SET_VALUE(2); /* Step 3: send a frame each 500ms */ tx_cnt = 0; tx_in_progress = false; LED_SET_VALUE(0); while(1) { WAIT500MS(); if (tx_in_progress == false) { txfrm[SEQ_OFFSET] = tx_cnt; txfrm[TX_FAIL_OFFSET] = fail_cnt; trx_frame_write (sizeof(txfrm), txfrm); tx_in_progress = true; TRX_SLPTR_HIGH(); TRX_SLPTR_LOW(); LED_SET(1); LED_TOGGLE(0); } } } #if defined(TRX_IF_RFA1) ISR(TRX24_TX_END_vect) { static volatile trx_regval_t trac_status; trac_status = trx_bit_read(SR_TRAC_STATUS); tx_in_progress = false; if (trac_status != TRAC_SUCCESS) { fail_cnt++; } else { tx_cnt ++; LED_CLR(1); } } #else /* !RFA1 */ ISR(TRX_IRQ_vect) { static volatile trx_regval_t irq_cause; static volatile trx_regval_t trac_status; irq_cause = trx_reg_read(RG_IRQ_STATUS); trac_status = trx_bit_read(SR_TRAC_STATUS); if (irq_cause & TRX_IRQ_TRX_END) { tx_in_progress = false; if (trac_status != TRAC_SUCCESS) { fail_cnt++; } else { tx_cnt ++; LED_CLR(1); } } } #endif /* RFA1 */ /* EOF */