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00072 #ifndef BOARD_TINY230_H
00073 #define BOARD_TINY230_H
00074
00075 #if defined(tiny230)
00076 # define BOARD_NAME "tiny230"
00077 # define BOARD_TYPE (BOARD_TINY230)
00078 # define RADIO_TYPE (RADIO_AT86RF230B)
00079 #elif defined(tiny231)
00080 # define BOARD_NAME "tiny231"
00081 # define BOARD_TYPE (BOARD_TINY231)
00082 # define RADIO_TYPE (RADIO_AT86RF231)
00083 #endif
00084
00085
00086 #ifndef DEFAULT_SPI_RATE
00087 # define DEFAULT_SPI_RATE (SPI_RATE_1_2)
00088 #endif
00089
00090
00091 #ifndef RADIO_TYPE
00092 #define RADIO_TYPE (RADIO_AT86RF230B)
00093 #endif
00094
00095
00096
00097 #define DDR_TRX_RESET DDRB
00098 #define PORT_TRX_RESET PORTB
00099 #define MASK_TRX_RESET (_BV(PB0))
00100
00101
00102
00103 #define PORT_TRX_SLPTR PORTB
00104 #define DDR_TRX_SLPTR DDRB
00105 #define MASK_TRX_SLPTR (_BV(PB1))
00106
00107
00108
00109
00110 # define TRX_IRQ _BV(INT0)
00111 # define TRX_IRQ_vect INT0_vect
00114 # define TRX_IRQ_INIT() do{\
00115 MCUCR = _BV(ISC00) | _BV(ISC01);\
00116 GIMSK |= _BV(INT0);\
00117 } while(0)
00120 #define DI_TRX_IRQ() {GIMSK &= (~(TRX_IRQ));}
00121
00122 #define EI_TRX_IRQ() {GIMSK |= (TRX_IRQ);}
00123
00125 #define TRX_TSTAMP_REG TCNT1
00126
00127
00128 #define SPI_TYPE SPI_TYPE_USI
00129 #define DDR_SPI (DDRA)
00130 #define PORT_SPI (PORTA)
00132 #define SPI_MOSI _BV(PA5)
00133 #define SPI_MISO _BV(PA6)
00134 #define SPI_SCK _BV(PA4)
00135 #define SPI_SS _BV(PA7)
00137 #define SPI_DATA_REG USIDR
00143 static inline void SPI_INIT(uint8_t spirate)
00144 {
00145
00146 DDR_SPI |= SPI_MOSI | SPI_SCK | SPI_SS;
00147 DDR_SPI &= ~SPI_MISO;
00148 PORT_SPI |= SPI_SS | SPI_MISO;
00149 }
00150
00152 #define SPI_SELN_LOW() uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
00153
00154 #define SPI_SELN_HIGH() PORT_SPI |= SPI_SS; SREG = sreg
00155
00156 #define SPI_WAITFOR() \
00157 do \
00158 { \
00159 USISR = _BV(USIOIF); \
00160 do \
00161 { \
00162 USICR = _BV(USIWM0)|_BV(USICS1)|_BV(USICLK)|_BV(USITC); \
00163 } while ((USISR & _BV(USIOIF)) == 0); \
00164 } while(0)
00165
00166
00167 #define LED_PORT PORTA
00168 #define LED_DDR DDRA
00169 #define LED_MASK (0x03)
00170 #define LED_SHIFT (0)
00171 #define LEDS_INVERSE (0)
00173 #define LED_NUMBER (2)
00176
00177
00178 #define PORT_KEY PORTA
00179 #define PIN_KEY PINA
00180 #define DDR_KEY DDRA
00181 #define MASK_KEY (0x04)
00182 #define SHIFT_KEY (2)
00183 #define INVERSE_KEYS (1)
00185 #define PULLUP_KEYS (1)
00186
00187 #define SLEEP_ON_KEY_INIT() \
00188 do{\
00189 PCMSK0 |= _BV(PCINT2);\
00190 }while(0)
00191
00192 #define SLEEP_ON_KEY() \
00193 do{\
00194 GIMSK |= _BV(PCIE0);\
00195 set_sleep_mode(SLEEP_MODE_PWR_DOWN);\
00196 sleep_mode();\
00197 GIMSK &= ~_BV(PCIE0);\
00198 } while(0)
00199
00200 #define SLEEP_ON_KEY_vect PCINT0_vect
00201
00202
00203
00205 #define HIF_TYPE HIF_NONE
00206
00207
00208 #define HWTMR_PRESCALE (1)
00209 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
00212 #define HWTIMER_TICK_NB (0xffffUL)
00214 #define HWTIMER_REG (TCNT1)
00216 #define TIMER_TICK (HWTIMER_TICK * HWTIMER_TICK_NB)
00217
00220 #define TIMER_POOL_SIZE (1)
00223 #define TIMER_INIT() \
00224 do{\
00225 TCCR1B |= _BV(CS10);\
00226 TIMSK1 |= _BV(TOIE1);\
00227 }while(0)
00228
00230 #define TIMER_IRQ_vect TIM1_OVF_vect
00231
00232 #endif